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Toybrick Wiki教程 TB-RK3399ProX TB-RK3399ProX系统概述
TB-RK3399ProX系统概述

产品简介

TB-RK3399ProX采用具有超强通用性能(Cortex-A72×2 + Cortex-A53×4)和超高 AI 算力(独立神经网络处理单元NPU,AI 算力高达 3.0Tops)的RK3399Pro作为主控芯片,并且为CPU配备了2GB/4GB运行内存NPU配备了1GB 运行内存(合计 3GB/5GB)。

TB-RK3399ProX核心板采用10层布线工艺,整体尺寸只有69.6mm×70mm,性能稳定可靠,适用于不同的应用环境。核心板通过SO-DIMM 260P标准接口与底板连接即可形成一块完整的 AI 开发板,也可与定制开发的底板连接形成一套完整的行业应用主板,可广泛应用于嵌入式人工智能领域。TB-RK3399ProX开发板支持Android和Linux双系统。

规格参数

核心板规格参数
SOC系统芯片Rockchip RK3399Pro
CPU

Dual-core Cortex-A72 up to 1.8GHz

Quad-core Cortex-A53 up to 1.4GHz

GPU

ARM Mali-T860 MP4 Quad-core GPU

支持 OpenGL ES1.1/2.0/3.0/3.1, OpenVG1.1, OpenCL, DX11

支持 AFBC(帧缓冲压缩)

NPU支持 8bit/16bit 运算,支持 TensorFlow、Caffe 模型运算性能高达 3.0TOPS
VPU

支持 4K VP9 and 4K 10bits H265/H264 视频解码,高达 60fps

1080P 多格式视频解码 (WMV, MPEG-1/2/4, VP8)

1080P 视频编码,支持 H.264,VP8 格式

视频后期处理器:反交错、去噪、边缘/细节/色彩优化

CPU内存2GB/4GB LPDRR4
NPU内存1GB DDR3
eMMC16GB/32GB eMMC
输入电源DC 12V/2A
支持系统Android、Linux
核心板尺寸69.6mm×70mm
PCB规格10层板,板厚1.2mm
接口类型SO-DIMM 260Pin
底板规格参数
显示接口1路HDMI2.0(Type-A)接口,支持4K/60fps输出

1路DP1.2(Type-A)接口,支持4K@60fps输出

1路MIPI接口,支持1920*1080@60fps输出

1路eDP1.3接口,支持2K@60fps输出
音频接口1路HDMI音频输出
1路Speaker,喇叭输出
1路耳机输出
1路麦克风,板载音频输入
以太网10/100/1000Mbps以太网,RJ45接口
无线网络支持5G/2.4G双频wifi, BT4.2
摄像头接口2路MIPI-CSI摄像头接口(CPU端最高支持13Mpixel,NPU端最高支持2Mpixel)
USB

2x USB2.0 Host,Type-A(CPU端侧)

1x USB3.0 OTG, Type-C(CPU端侧)
PCIe1路PCIe x4标准接口,支持基于PICe 高速WIFI、存储等设备的扩展
按键

1x Recovery按键

1x Reset按键

1x Power按键

调试1路调试串口(Micro USB接口)
串口1路Uart接口
扩展接口

40Pin扩展接口包括:

• 8通道I2S接口(支持麦克风阵列)

• 2路ADC接口

• 2路I2C接口

• 2个GPIO口

• 输出3路VCC电源(12V、3.3V、5V)

硬件接口定义

图片1.png

SO-DIMM 260P接口定义

 1.png           2.png 

接口电气特性描述

Power
Pin NumPin NetTypeRatedTolerance
1VCC5V0_SYS_S3

Power In

5.0V+/-10%
2
3
4
10VCC12V_DCINPower In12.0V+/-10%
9VCCIO_3V3_S0Power Out3.3V+/-10%
11
13VCC3V3_SYS_S3Power Out3.3V+/-10%
15
12VCC_1V8_S3Power Out
1.8V+/-10%
14VCC_RTC_S5Power In5.0V+/-10%
16VCC3V0_SD_S0Power Out3.0V+/-10%
18VCCIO_3V0_S0Power Out3.0V+/-10%
20VCC_1V8_S0Power Out1.8V+/-10%
Note:VCC_RTC_S5需要最先上电,且为整板最高的输入电压


WIFI/BT module interface
Pin NumPin NetTypeleveldescription
19WIFI_HOST_WAKE_LIn1.8V
WLAN to wake-up HOST
21WIFI_REG_ON_HOutPower up/down internal regulators
23BT_REG_ON_HOutPower up/down internal regulators
25BT_HOST_WAKE_LInBluetooth device to wake-up HOST
27BT_WAKE_L
OutHOST wake-up Bluetooth device
24UART0_CTS_BT
OutBluetooth UART interface
26UART0_RTS_BTInBluetooth UART interface
28UART0_RXD_BTOutBluetooth UART interface
30UART0_TXD_BTInBluetooth UART interface
128SDIO0_CLKIn/OutSDIO clock line
130SDIO0_CMDIn/OutSDIO command line
132SDIO0In/OutSDIO data line 0
134SDIO1In/OutSDIO data line 1
136SDIO2In/OutSDIO data line 2
138SDIO3In/OutSDIO data line 3
96CLKOUT_32KOut--32.768KHz output for BT


MIPI_TX interface
Pin NumPin NetTypeleveldescription
32
TOUCH_INT_LIn3.0VTP interrupt
34TOUCH_RST_LOut3.0VTP reset
44LCD_BL_PWM
Out3.0VLCD BackLight PWM
46MIPI_PWREN_HOut3.0VMIPI Power Enable
217I2C4_SDA_TP
In/Out1.8VTP I2C interface
219I2C4_SCL_TPOut1.8VTP I2C interface
79MIPI_TX0_D3POutMIPI_TX
MIPI Tx Date line
77MIPI_TX0_D3NOutMIPI Tx Date line
83MIPI_TX0_D2POutMIPI Tx Date line
85MIPI_TX0_D2NOutMIPI Tx Date line
89MIPI_TX0_CLKNOutMIPI Tx CLK line
91MIPI_TX0_CLKPOutMIPI Tx CLK line
95MIPI_TX0_D1POutMIPI Tx Date line
97MIPI_TX0_D1NOutMIPI Tx Date line
101MIPI_TX0_D0NOutMIPI Tx Date line
103MIPI_TX0_D0POutMIPI Tx Date line


MIPI_TRX interface
Pin NumPin NetTypeleveldescription
36MIPI_RST2Out1.8Vreset
38MIPI_PDN2Out1.8Vpower down
230MIPI_MCLKOut1.8VMCLK
115I2C1_SDA_1V8In/Out1.8VI2C interface
117I2C1_SCL_1V8Out1.8VI2C interface
50MIPI_TX1/RX1_D0PIn/OutMIPI_TRXMIPI TRx Date line
52MIPI_TX1/RX1_D0NIn/OutMIPI TRx Date line
56MIPI_TX1/RX1_CLKPIn/OutMIPI TRx CLK line
58MIPI_TX1/RX1_CLKNIn/OutMIPI TRx CLK line
62MIPI_TX1/RX1_D1NIn/OutMIPI TRx Date line
64MIPI_TX1/RX1_D1PIn/OutMIPI TRx Date line
68MIPI_TX1/RX1_D2NIn/OutMIPI TRx Date line
70MIPI_TX1/RX1_D2PIn/OutMIPI TRx Date line
74MIPI_TX1/RX1_D3NIn/OutMIPI TRx Date line
76MIPI_TX1/RX1_D3PIn/OutMIPI TRx Date line


NPU_MIPI_RX interface
Pin NumPin NetTypeleveldescription
41GPIO4_D1_3V0Out3.0Vpower down
43GPIO4_D2_3V0Out3.0Vreset
205NPU_I2C3_SDA_N4
In/Out1.8VI2C interface
207NPU_I2C3_SCL_N4Out1.8VI2C interface
208N4_MIPI_PDN
Out1.8Vpower down
210N4_RSTOut1.8Vreset
214NPU_CIF_CLKOUTOut1.8VMIPI Rx Date line
47NPU_MIPI_RX_D3POutMIPI_RX
MIPI Rx Date line
49NPU_MIPI_RX_D3NOutMIPI Rx Date line
53NPU_MIPI_RX_CLKPOutMIPI Rx CLK line
55NPU_MIPI_RX_CLKNOutMIPI Rx CLK line
59NPU_MIPI_RX_D1NOutMIPI Rx Date line
61NPU_MIPI_RX_D1POutMIPI Rx Date line
65NPU_MIPI_RX_D0NOutMIPI Rx Date line
67NPU_MIPI_RX_D0POutMIPI Rx Date line
71NPU_MIPI_RX_D2NOutMIPI Rx Date line
73NPU_MIPI_RX_D2POutMIPI Rx Date line
Note:pin41 and pin43 used as PDN and Reset function,need add divide-voltage circuit.


HDMI Out interface
Pin NumPin NetTypeleveldescription
109I2C3_SCL_HDMIOut3.0VI2C interface
111I2C3_SDA_HDMIIn/Out3.0VI2C interface
107HDMI_CECIn3.0VHDMI CEC
113HDMI_PORT_HPDIn1.8VHDMI HPD
100HDMI_TXCPOutHDMI_TX
HDMI Tx CLK Line
102HDMI_TXCN
OutHDMI Tx CLK Line
106HDMI_TX0NOutHDMI Tx Data Line
108HDMI_TX0POutHDMI Tx Data Line
112HDMI_TX2NOutHDMI Tx Data Line
114HDMI_TX2POutHDMI Tx Data Line
118HDMI_TX1POutHDMI Tx Data Line
120HDMI_TX1NOutHDMI Tx Data Line
Note:

1. I2C level need match with HDMI 5V Level,external circuit is needed.

2. HDMI_CEC,external Pull-up is needed.


EDP interface
Pin NumPin NetTypeleveldescription
221eDP_TP_INTIn1.8Vedp TP interrupt
223eDP_TP_RSTOut1.8Vedp TP Reset
40LCD_BL_EN_H
Out3.0V
LCD BackLight enable
212LCD_PWREN_HOut1.8VLCD_PWREN_H
44LCD_BL_PWMOut3.0VLCD BackLight control
217I2C4_SDA_TP
In/Out1.8VI2C interface for TP
219I2C4_SCL_TPOut1.8VI2C interface for TP
231EDP_TX3NOutEDP_TXEDP Tx Data Line
233EDP_TX3POutEDP Tx Data Line
237EDP_TX2NOutEDP Tx Data Line
239EDP_TX2POutEDP Tx Data Line
243EDP_TX1NOutEDP Tx Data Line
245EDP_TX1POutEDP Tx Data Line
249EDP_TX0NOutEDP Tx Data Line
251EDP_TX0POutEDP Tx Data Line
255EDP_AUXNOutEDP AUX Line
257EDP_AUXPOutEDP AUX Line
Note:

1.  pin44 LCD_BL_PWM share with MIPI_TX.

2. I2C interface shared with MIPI_TX.


PCIE interface
Pin NumPin NetTypeleveldescription
115I2C1_SDA_1V8In/Out1.8VI2C interface
117I2C1_SCL_1V8
Out1.8VI2C interface
201PCIE_PERST#_LOut1.8VPCIE reset
142PCIE_RX2PIn

PCIE_TX&PCIE_RX

PCIE Rx Data Line
144PCIE_RX2NInPCIE Rx Data Line
148PCIE_TX2NOutPCIE Tx Data Line
150PCIE_TX2POutPCIE Tx Data Line
154PCIE_RX0PInPCIE Rx Data Line
156PCIE_RX0NInPCIE Rx Data Line
160PCIE_TX0NOutPCIE Tx Data Line
162PCIE_TX0POutPCIE Tx Data Line
166PCIE_REF_CLKN
OutPCIE CLK Line
168PCIE_REF_CLKPOutPCIE CLK Line
177PCIE_RX3PInPCIE Rx Data Line
179PCIE_RX3NInPCIE Rx Data Line
183PCIE_TX3NOutPCIE Tx Data Line
185PCIE_TX3POutPCIE Tx Data Line
189PCIE_TX1NOutPCIE Tx Data Line
191
PCIE_TX1POutPCIE Tx Data Line
195PCIE_RX1PInPCIE Rx Data Line
197PCIE_RX1NInPCIE Rx Data Line

Note:

1. I2C interface need external 1.8V-3.3V Level conversion circuit.

2. PCIE_PERST# need external 1.8V-3.3V Level conversion circuit.


SDMMC interface
Pin NumPin NetTypelevel
172SDMMC0_CLKOut1.8V/3.0V
174SDMMC0_CMDOut1.8V/3.0V
176SDMMC0_DET_LIn1.8V
178SDMMC0_D0/UART2_RXIn/Out1.8V/3.0V
180SDMMC0_D1/UART2_TX
In/Out1.8V/3.0V
182SDMMC0_D2/JTAG_TCKIn/Out1.8V/3.0V
184SDMMC0_D3/JTAG_TMSIn/Out1.8V/3.0V
Note: SDMMC interface level 1V8/3V0 Auto switch



MAC interface
Pin NumPin NetTypeleveldescription
225MAC_MDIO
In/Out3.3Vin/out of management data
227MAC_MDCLKOut3.3Vmanagement data clock
232PHY_RST
Out3.3VPHY reset
234MAC_CLKIn3.3VClock From PHY to MAC
236PHY_TXENOutMAC TX
&
MAC RX
MAC Tx CTRL signal
238PHY_TXD3OutMAC TX data3
240PHY_TXD2OutMAC TX data2
242PHY_TXD1OutMAC TX data1
244PHY_TXD0OutMAC TX data0
246PHY_TXCLK
OutTx ref CLK depend on speed
248MAC_RXD3InMAC RX data3
250MAC_RXD2InMAC RX data2
252MAC_RXD1InMAC RX data1
254MAC_RXD0InMAC RX data0
256MAC_RXCLK
InRX ref CLK from RX data stream
258MAC_RXDVInMAC Rx CTRL signal
260PHY_INTIn3.3VPHY interrupt signal


Type-C(USB3.0)interface
Pin NumPin NetTypeleveldescription
131TYPEC0_SBU1_DCOutTypeC
interface
TYPEC0_AuxP_PD_PU
133TYPEC0_SBU2_DCOutTYPEC0_AuxP_PD_PD
135TYPEC0_SBU2OutTypeC AuxM
137TYPEC0_SBU1OutTypeC AuxP
141TYPEC0_RX1NInTypeC Rx data
143TYPEC0_RX1PInTypeC Rx data
147TYPEC0_RX2PInTypeC Rx data
149TYPEC0_RX2NInTypeC Rx data
153TYPEC0_TX2NOutTypeC Tx data
155TYPEC0_TX2POutTypeC Tx data
159TYPEC0_TX1POutTypeC Tx data
161TYPEC0_TX1NOutTypeC Tx data
165TYPEC0_DM
In/OutUSB_DM
167TYPEC0_DPIn/OutUSB_DP
129TYPEC0_U2VBUSDETIntypeC detect
203TYPEC_CC_INT_LIn1.8VtypeC cc interrupt
204I2C8_SDA_CCIn/Out1.8VI2C interface
206I2C8_SCL_CCOut1.8VI2C interface
42VCC5V0_TYPEC0_ENOut3.0V5V output power enable
Note:I2C interface internal pull-up.


USB2.0 host interface
Pin NumPin NetTypeleveldescription
218HOST0_DMIn/OutUSB2.0
USB2.0 host0 dm
220HOST0_DPIn/OutUSB2.0 host0 dp
224HOST1_DMIn/OutUSB2.0
USB2.0 host1 dm
226HOST1_DPIn/OutUSB2.0 host1 dp
202USB5V0_EN_H
Out1.8VUSB2.0 host power enable


CTIA headphone interface
Pin NumPin NetTypeleveldescription
84MIC2_INInanalogmic2 input
186ADC3_HP_HOOK_In1.8VADC used for Hook
88HPLOutanalogHP left
90HPROutanalogHP right
92HP_SNSGNDGND
200
PHONE_DET_HIn1.8VHeadphone detect
MIC interface
Pin NumPin NetTypeleveldescription
86MIC1_INInanalogmic1 input
Speaker interface
Pin NumPin NetTypeleveldescription
80SPKN_OUTOutanalogconnect SPK,1.3W max
82SPKP_OUTOutanalogconnect SPK,1.3W max


Other
Pin NumPin NetTypeleveldescription
33RECOVERY_KEY
In1.8VRecovery pin,connect key
35RESET_KEYIn1.8VADC input,connect key
37POWER_KEY
In1.8VPower pin,connect key
171HYM_RTC_INT_LIn/Out1.8VGPIOdefault input
173GPIO1_A1_ReserveIn/Out1.8VGPIO,default input
192LED_RGB_RIn/Out1.8VGPIOdefault output Low
194LED_RGB_G
In/Out1.8VGPIOdefault output Low
29UART2_RX_DEBUGIn3.0Vdebug interface
31UART2_TX_DEBUGOut3.0Vdebug interface
196UART4_RX_1V8In1.8VUART interface
198UART4_TX_1V8Out1.8VUART interface
39EXT_EN_HOut5.0V5V power enable
Note:

1. pin192/194 are used as LED status indicator by default.

2. pin29/31 UART2 interface are used for debug port only.


Extensible 40 pin interfaceI2SGPIOADCI2C
Pin NumPin NetTypeleveldescription
41GPIO4_D1_3V0In/Out3.0VGPIOdefault output Low
43GPIO4_D2_3V0In/Out3.0VGPIOdefault output Low
188ADC5_IN
In1.8VADC input
190ADC1_INIn1.8VADC input
119I2S0_SDI3/SPK_LOOP
InI2S
I2S SDI3
121I2S0_SDI2InI2S SDI2
123I2S0_SDI1InI2S SDI1
125I2S0_SDI0InI2S SDI0
127I2S0_SCLKIn/OutI2S SCLK
124I2S0_LRCK_RXIn/OutI2S LRLK
126I2S_CLKOutI2S MCLK
209I2C6_SDA_1V8In/Out1.8VI2C interface
211I2C6_SCL_1V8Out1.8VI2C interface
213I2C7_SDA_1V8In/Out1.8VI2C interface
215I2C7_SCL_1V8Out1.8VI2C interface











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