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TB-RK3399ProX开发板规格书

产品简介

TB-RK3399ProX采用具有超强通用性能（Cortex-A72×2 + Cortex-A53×4）和超高 AI 算力（独立神经网络处理单元NPU，AI 算力高达 3.0Tops）的RK3399Pro作为主控芯片，并且为CPU配备了2GB/4GB运行内存NPU配备了1GB 运行内存（合计 3GB/5GB）。

TB-RK3399ProX核心板采用10层布线工艺，整体尺寸只有69.6mm×70mm，性能稳定可靠，适用于不同的应用环境。核心板通过SO-DIMM 260P标准接口与底板连接即可形成一块完整的 AI 开发板，也可与定制开发的底板连接形成一套完整的行业应用主板，可广泛应用于嵌入式人工智能领域。TB-RK3399ProX开发板支持Android和Linux双系统。

产品优势

  • 尺寸更小：核心板尺寸仅69.6mm×70mm，紧凑尺寸的封装形式满足小型终端产品对空间的需求。
  • 性价比高：成本低，适合中小规模用户使用。
  • 支持双系统：支持android和linux系统。
  • 高度可定制化：CPU端与NPU端均支持可定制性开发，仅需要简单的操作就能升级修改固件。

产品规格

核心板规格参数
SOC 系统芯片 Rockchip RK3399Pro
CPU 中央处理器 Dual-core Cortex-A72 up to 1.8GHz
Quad-core Cortex-A53 up to 1.4GHz
GPU 图形处理器 ARM Mali-T860 MP4 Quad-core GPU
支持 OpenGL ES1.1/2.0/3.0/3.1, OpenVG1.1, OpenCL, DX11
支持 AFBC（帧缓冲压缩）
NPU 嵌入式神经网络处理器 支持 8bit/16bit 运算，支持 TensorFlow、Caffe 模型，运算性能高达 3.0TOPS
VPU 视频处理单元 支持 4K VP9 and 4K 10bits H265/H264 视频解码，高达 60fps
1080P 多格式视频解码 (WMV, MPEG-1/2/4, VP8)
1080P 视频编码，支持 H.264，VP8 格式
视频后期处理器：反交错、去噪、边缘/细节/色彩优化
CPU 内存 2GB/4GB LPDRR4
NPU 内存 1GB DRR3
Storage 闪存 16GB/32GB eMMC for CPU
输入电源 DC 12V/2A
系统支持 Android、Linux
核心板尺寸 69.6mm×70mm
PCB 规格 10 层板，板厚1.2mm
接口类型 SODIMM-260Pin
底板规格参数
显示接口 1路HDMI2.0(Type-A)接口，支持4K/60fps输出
1路DP1.2(Type-A)接口，支持4K@60fps输出
1路MIPI接口，支持1920*1080@60fps输出
1路eDP1.3接口，支持2K@60fps输出
音频接口 1路HDMI音频输出
1路Speaker，喇叭输出
1路耳机输出
1路麦克风，板载音频输入
以太网 10/100/1000Mbps以太网，RJ45接口
无线网络 支持5G/2.5G双频wifi, BT4.2
摄像头接口 2路MIPI-CSI摄像头接口（最高支持单13Mpixel或双8Mpixel）
USB 2x USB2.0 Host,Type-A(CPU端侧) 1x USB3.0 OTG, Type-C(CPU端侧)
PCIe 1路PCIe x4标准接口，支持基于PICe 高速WIFI、存储等设备的扩展
按键 1x Recovery按键； 1x Reset按键； 1x Power按键；
调试 1路调试串口（Micro USB接口）
串口 1路uart接口
扩展接口 40Pin扩展接口包括：
8通道I2S接口（支持麦克风阵列）
2路ADC接口
2路I2C接口
2个GPIO口
输出3路VCC电源（12V、3.3V、5V））
底板尺寸 145mm*102mm

接口定义

接口图：

SO-DIMM 260P接口定义

接口电气特性描述

  1. Power
Pin Num Pin net Type Rated tolerance
1 VCC5V0_SYS_S3 Power In 5.0V/4A +/-10%
2 VCC5V0_SYS_S3 Power In 5.0V/4A +/-10%
3 VCC5V0_SYS_S3 Power In 5.0V/4A +/-10%
4 VCC5V0_SYS_S3 Power In 5.0V/4A +/-10%
10 VCC12V_DCIN Power In 12.0V/0.02A +/-10%
9 VCCIO_3V3_S0 Power Out 3.3V/1.2A +/-10%
11 VCCIO_3V3_S0 Power Out 3.3V/1.2A +/-10%
13 VCC3V3_SYS_S3 Power Out 3.3V/1.2A +/-10%
15 VCC3V3_SYS_S3 Power Out 3.3V/1.2A +/-10%
12 VCC_1V8_S3 Power Out 1.8V/0.1A +/-10%
14 VCC_RTC_S5 Power In 5.0V/0.01A +/-10%
16 VCC3V0_SD_S0 Power Out 3.0V/0.4A +/-10%
18 VCCIO_3V0_S0 Power Out 3.0V/0.4A +/-10%
20 VCC_1V8_S0 Power Out 1.8V/0.2A +/-10%

Note：VCC_RTC_S5需要最先上电，且为整板最高的输入电压

  1. WIFI/BT module interface
Pin Num Pin net Type level description
19 WIFI_HOST_WAKE_L In 1.8V WLAN to wake-up HOST
21 WIFI_REG_ON_H Out 1.8V Power up/down internal regulators
23 BT_REG_ON_H Out 1.8V Power up/down internal regulators
25 BT_HOST_WAKE_L In 1.8V Bluetooth device to wake-up HOST
27 BT_WAKE_L Out 1.8V HOST wake-up Bluetooth device
24 UART0_CTS_BT Out 1.8V Bluetooth UART interface
26 UART0_RTS_BT In 1.8V Bluetooth UART interface
28 UART0_RXD_BT Out 1.8V Bluetooth UART interface
30 UART0_TXD_BT In 1.8V Bluetooth UART interface
128 SDIO0_CLK In/Out 1.8V SDIO clock line
130 SDIO0_CMD In/Out 1.8V SDIO command line
132 SDIO0 In/Out 1.8V SDIO data line 0
134 SDIO1 In/Out 1.8V SDIO data line 1
136 SDIO2 In/Out 1.8V SDIO data line 2
138 SDIO3 In/Out 1.8V SDIO data line 3
96 CLKOUT_32K out —— 32.768KHz output for BT
  1. MIPI_TX interface
Pin num Pin net Type level description
32 TOUCH_INT_L In 3.0V TP interrupt
34 TOUCH_RST_L Out 3.0V TP reset
44 LCD_BL_PWM Out 3.0V LCD BackLight PWM
46 MIPI_PWREN_H Out 3.0V MIPI Power Enable
217 I2C4_SDA_TP In/Out 1.8V TP I2C interface
219 I2C4_SCL_TP Out 1.8V TP I2C interface
79 MIPI_TX0_D3P Out MIPI_TX MIPI Tx Date line
77 MIPI_TX0_D3N Out MIPI_TX MIPI Tx Date line
83 MIPI_TX0_D2P Out MIPI_TX MIPI Tx Date line
85 MIPI_TX0_D2N Out MIPI_TX MIPI Tx Date line
89 MIPI_TX0_CLKN Out MIPI_TX MIPI Tx CLK line
91 MIPI_TX0_CLKP Out MIPI_TX MIPI Tx CLK line
95 MIPI_TX0_D1P Out MIPI_TX MIPI Tx Date line
97 MIPI_TX0_D1N Out MIPI_TX MIPI Tx Date line
101 MIPI_TX0_D0N Out MIPI_TX MIPI Tx Date line
103 MIPI_TX0_D0P Out MIPI_TX MIPI Tx Date line
  1. MIPI_TX_RX interface
Pin num Pin net Type level description
36 MIPI_RST2 Out 1.8V reset
38 MIPI_PDN2 Out 1.8V power down
230 MIPI_MCLK Out 1.8V MCLK
115 I2C1_SDA_1V8 In/Out 1.8V I2C interface
117 I2C1_SCL_1V8 Out 1.8V I2C interface
50 MIPI_TX1/RX1_D0P In/Out MIPI_TRX MIPI TRx Date line
52 MIPI_TX1/RX1_D0N In/Out MIPI_TRX MIPI TRx Date line
56 MIPI_TX1/RX1_CLKP In/Out MIPI_TRX MIPI TRx CLK line
58 MIPI_TX1/RX1_CLKN In/Out MIPI_TRX MIPI TRx CLK line
62 MIPI_TX1/RX1_D1N In/Out MIPI_TRX MIPI TRx Date line
64 MIPI_TX1/RX1_D1P In/Out MIPI_TRX MIPI TRx Date line
68 MIPI_TX1/RX1_D2N In/Out MIPI_TRX MIPI TRx Date line
70 MIPI_TX1/RX1_D2P In/Out MIPI_TRX MIPI TRx Date line
74 MIPI_TX1/RX1_D3N In/Out MIPI_TRX MIPI TRx Date line
76 MIPI_TX1/RX1_D3P In/Out MIPI_TRX MIPI TRx Date line
  1. NPU_MIPI_RX interface
Pin num Pin net Type level description
41 GPIO4_D1_3V0 Out 3.0V power down
43 GPIO4_D2_3V0 Out 3.0V reset
205 NPU_I2C3_SDA_N4 In/Out 1.8V I2C interface
207 NPU_I2C3_SCL_N4 Out 1.8V I2C interface
208 N4_MIPI_PDN Out 1.8V power down
210 N4_RST Out 1.8V reset
214 NPU_CIF_CLKOUT Out 1.8V MIPI Rx Date line
47 NPU_MIPI_RX_D3P Out MIPI_RX MIPI Rx Date line
49 NPU_MIPI_RX_D3N Out MIPI_RX MIPI Rx Date line
53 NPU_MIPI_RX_CLKP Out MIPI_RX MIPI Rx CLK line
55 NPU_MIPI_RX_CLKN Out MIPI_RX MIPI Rx CLK line
59 NPU_MIPI_RX_D1N Out MIPI_RX MIPI Rx Date line
61 NPU_MIPI_RX_D1P Out MIPI_RX MIPI Rx Date line
65 NPU_MIPI_RX_D0N Out MIPI_RX MIPI Rx Date line
67 NPU_MIPI_RX_D0P Out MIPI_RX MIPI Rx Date line
71 NPU_MIPI_RX_D2P Out MIPI_RX MIPI Rx Date line
73 NPU_MIPI_RX_D2N Out MIPI_RX MIPI Rx Date line

Note：pin41 and pin43 used as PDN and Reset function，need add divide-voltage circuit.

  1. HDMI Out interface
Pin num Pin net Type level description
109 I2C3_SCL_HDMI Out 3.0V I2C interface
111 I2C3_SDA_HDMI In/Out 3.0V I2C interface
107 HDMI_CEC In 3.0V HDMI CEC
113 HDMI_PORT_HPD In 1.8V HDMI HPD
100 HDMI_TXCP Out HDMI_TX HDMI Tx CLK Line
102 HDMI_TXCN Out HDMI_TX HDMI Tx CLK Line
106 HDMI_TX0N Out HDMI_TX HDMI Tx Data Line
108 HDMI_TX0P Out HDMI_TX HDMI Tx Data Line
112 HDMI_TX2N Out HDMI_TX HDMI Tx Data Line
114 HDMI_TX2P Out HDMI_TX HDMI Tx Data Line
118 HDMI_TX1P Out HDMI_TX HDMI Tx Data Line
120 HDMI_TX1N Out HDMI_TX HDMI Tx Data Line

Note:

  • I2C level need match with HDMI 5V Level，external circuit is needed.
  • HDMI_CEC，external Pull-up is needed.
  1. EDP interface
Pin num Pin net Type level description
221 eDP_TP_INT In 1.8V edp TP interrupt
223 eDP_TP_RST Out 1.8V edp TP Reset
40 LCD_BL_EN_H Out 3.0V LCD BackLight enable
212 LCD_PWREN_H Out 1.8V LCD_PWREN_H
44 LCD_BL_PWM Out 3.0V LCD BackLight control
217 I2C4_SDA_TP In/Out 1.8V I2C interface for TP
219 I2C4_SCL_TP Out 1.8V I2C interface for TP
231 EDP_TX3N Out EDP_TX EDP Tx Data Line
233 EDP_TX3P Out EDP_TX EDP Tx Data Line
237 EDP_TX2N Out EDP_TX EDP Tx Data Line
239 EDP_TX2P Out EDP_TX EDP Tx Data Line
243 EDP_TX1N Out EDP_TX EDP Tx Data Line
245 EDP_TX1P Out EDP_TX EDP Tx Data Line
249 EDP_TX0N Out EDP_TX EDP Tx Data Line
251 EDP_TX0P Out EDP_TX EDP Tx Data Line
255 EDP_AUXN Out EDP_TX EDP AUX Line
257 EDP_AUXP Out EDP_TX EDP AUX Line

Note:

  • pin44 LCD_BL_PWM share with MIPI_TX.
  • I2C interface shared with MIPI_TX.
  1. PCIE interface
Pin num Pin net Type level description
115 I2C1_SDA_1V8 In/Out 1.8V I2C interface
117 I2C1_SCL_1V8 Out 1.8V I2C interface
201 PCIE_PERST#_L Out 1.8V PCIE reset
142 PCIE_RX2P In PCIE_TX & PCIE_RX PCIE Rx Data Line
144 PCIE_RX2N In PCIE_TX & PCIE_RX PCIE Rx Data Line
148 PCIE_TX2N Out PCIE_TX & PCIE_RX PCIE Tx Data Line
150 PCIE_TX2P Out PCIE_TX & PCIE_RX PCIE Tx Data Line
154 PCIE_RX0N In PCIE_TX & PCIE_RX PCIE Rx Data Line
156 PCIE_RX0P In PCIE_TX & PCIE_RX PCIE Rx Data Line
160 PCIE_TX0P Out PCIE_TX & PCIE_RX PCIE Tx Data Line
162 PCIE_TX0N Out PCIE_TX & PCIE_RX PCIE Tx Data Line
166 PCIE_REF_CLKN Out PCIE_TX & PCIE_RX PCIE CLK Line
168 PCIE_REF_CLKP Out PCIE_TX & PCIE_RX PCIE CLK Line
177 PCIE_RX3P In PCIE_TX & PCIE_RX PCIE Rx Data Line
179 PCIE_RX3N In PCIE_TX & PCIE_RX PCIE Rx Data Line
183 PCIE_TX3P Out PCIE_TX & PCIE_RX PCIE Tx Data Line
185 PCIE_TX3N Out PCIE_TX & PCIE_RX PCIE Tx Data Line
189 PCIE_TX1N Out PCIE_TX & PCIE_RX PCIE Tx Data Line
191 PCIE_TX1P Out PCIE_TX & PCIE_RX PCIE Tx Data Line
195 PCIE_RX1P In PCIE_TX & PCIE_RX PCIE Rx Data Line
197 PCIE_RX1N In PCIE_TX & PCIE_RX PCIE Rx Data Line

Note:

  • I2C interface need external 1.8V-3.3V Level conversion circuit.
  • PCIE_PERST# need external 1.8V-3.3V Level conversion circuit.
  1. SDMMC interface
Pin num Pin net Type level
172 SDMMC0_CLK Out 1.8V/3.0V
174 SDMMC0_CMD Out 1.8V/3.0V
176 SDMMC0_DET_L In 1.8V
178 SDMMC0_D0/UART2_RX In/Out 1.8V/3.0V
180 SDMMC0_D1/UART2_TX In/Out 1.8V/3.0V
182 SDMMC0_D2/JTAG_TCK In/Out 1.8V/3.0V
184 SDMMC0_D3/JTAG_TMS In/Out 1.8V/3.0V

Note: SDMMC interface level 1V8/3V0 Auto switch

  1. MAC interface
Pin num Pin net Type level description
225 MAC_MDIO In/Out 3.3V in/out of management data
227 MAC_MDCLK Out 3.3V management data clock
232 PHY_RST Out 3.3V PHY reset
234 MAC_CLK IN 3.3V Clock From PHY to MAC
236 PHY_TXEN Out MAC TX & MAC RX MAC Tx CTRL signal
238 PHY_TXD3 Out MAC TX & MAC RX MAC TX data3
240 PHY_TXD2 Out MAC TX & MAC RX MAC TX data2
242 PHY_TXD1 Out MAC TX & MAC RX MAC TX data1
244 PHY_TXD0 Out MAC TX & MAC RX MAC TX data0
246 PHY_TXCLK Out MAC TX & MAC RX Tx ref CLK depend on speed
248 MAC_RXD3 In MAC TX & MAC RX MAC RX data3
250 MAC_RXD2 In MAC TX & MAC RX MAC RX data2
252 MAC_RXD1 In MAC TX & MAC RX MAC RX data1
254 MAC_RXD0 In MAC TX & MAC RX MAC RX data0
256 MAC_RXCLK In MAC TX & MAC RX RX ref CLK from RX data stream
258 MAC_RXDV In MAC TX & MAC RX MAC Rx CTRL signal
260 PHY_INT In 3.3V PHY interrupt signal
  1. TypeC(USB3.0） interface
Pin num Pin net Type level description
131 TYPEC0_SBU1_DC Out TypeC interface TYPEC0_AuxP_PD_PU
133 TYPEC0_SBU2_DC Out TypeC interface TYPEC0_AuxM_PU_PD
135 TYPEC0_SBU2 Out TypeC interface TypeC AuxM
137 TYPEC0_SBU1 Out TypeC interface TypeC AuxP
141 TYPEC0_RX1N In TypeC interface TypeC Rx data
143 TYPEC0_RX1P In TypeC interface TypeC Rx data
147 TYPEC0_RX2P In TypeC interface TypeC Rx data
149 TYPEC0_RX2N In TypeC interface TypeC Rx data
153 TYPEC0_TX2N Out TypeC interface TypeC Tx data
155 TYPEC0_TX2P Out TypeC interface TypeC Tx data
159 TYPEC0_TX1P Out TypeC interface TypeC Tx data
161 TYPEC0_TX1N Out TypeC interface TypeC Tx data
165 TYPEC0_DM In/Out TypeC interface USB_DM
167 TYPEC0_DP In/Out TypeC interface USB_DP
129 TYPEC0_U2VBUSDET In TypeC interface typeC detect
203 TYPEC_CC_INT_L In 1.8V typeC cc interrupt
204 I2C8_SDA_CC In/Out 1.8V I2C interface
206 I2C8_SCL_CC Out 1.8V I2C interface
42 VCC5V0_TYPEC0_EN Out 3.0V 5V output power enable

Note:I2C interface internal pull-up.

  1. USB2.0 host interface
Pin num Pin net Type level description
218 HOST0_DM In/Out usb2.0 USB2.0 host0 dm
220 HOST0_DP In/Out usb2.0 USB2.0 host0 dp
224 HOST1_DM In/Out usb2.0 USB2.0 host1 dm
226 HOST1_DP In/Out usb2.0 USB2.0 host1 dp
202 USB5V0_EN_H Out 1.8V USB2.0 host power enable
  1. CTIA headphone interface
Pin num Pin net Type level description
84 MIC2_IN In analog mic2 input
186 ADC3_HP_HOOK_ In 1.8V ADC used for Hook
88 HPL Out analog HP left
90 HPR Out analog HP right
92 HP_SNS GND GND
200 PHONE_DET_H In 1.8V Headphone detect
  1. MIC interface
Pin num Pin net Type level description
86 MIC1_IN In analog mic1 input
  1. Speaker interface
Pin num Pin net Type level description
80 SPKN_OUT Out analog connect SPK,1.3W max
82 SPKP_OUT Out analog connect SPK,1.3W max
  1. Other
pin num Pin net Type level description
33 RECOVERY_KEY In 1.8V Recovery pin,connect key
35 RESET_KEY In 1.8V ADC input,connect key
37 POWER_KEY In 1.8V Power pin,connect key
171 HYM_RTC_INT_L In/Out 1.8V GPIO，default input
173 GPIO1_A1_Reserve In/Out 1.8V GPIO，default input
192 LED_RGB_R In/Out 1.8V GPIO，default output Low
194 LED_RGB_G In/Out 1.8V GPIO，default output Low
29 UART2_RX_DEBUG In 3.0V debug interface
31 UART2_TX_DEBUG Out 3.0V debug interface
196 UART4_RX_1V8 In 1.8V UART interface
198 UART4_TX_1V8 Out 1.8V UART interface
39 EXT_EN_H Out 5.0V 5V power enable

Note:

  • pin192/194 are used as LED status indicator by default.
  • pin29/31 UART2 interface are used for debug port only.
  1. Extensible 40 pin interface（I2S，GPIO，ADC，I2C）
Pin num Pin net Type level description
41 GPIO4_D1_3V0 In/Out 3.0V GPIO，default output Low
43 GPIO4_D2_3V0 In/Out 3.0V GPIO，default output Low
188 ADC5_IN In 1.8V ADC input
190 ADC1_IN In 1.8V ADC input
119 I2S0_SDI3/SPK_LOOP In I2S I2S SDI3
121 I2S0_SDI2 In I2S I2S SDI2
123 I2S0_SDI1 In I2S I2S SDI1
125 I2S0_SDI0 In I2S I2S SDI0
127 I2S0_SCLK In/Out I2S I2S SCLK
124 I2S0_LRCK_RX In/Out I2S I2S LRCK
126 I2S_CLK Out I2S I2S Mclk
209 I2C6_SDA_1V8 In/Out 1.8V I2C interface
211 I2C6_SCL_1V8 Out 1.8V I2C interface
213 I2C7_SDA_1V8 In/Out 1.8V I2C interface
215 I2C7_SCL_1V8 Out 1.8V I2C interface

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