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按照您所说的做出对应修改，即把把uboot中optee相关的宏disable掉，然后将arch/arm/mach-rockchip/boot_mode.c 中的toybrick_SnMacAc_check()函数中的内容注释掉，编译u-boot时报错：
common/built-in.o: In function `android_bootloader_boot_flow':
/home/hyy/rk3399pro_optee/u-boot/common/android_bootloader.c:1123: undefined reference to `trusty_read_vbootkey_enable_flag'
drivers/usb/gadget/built-in.o: In function `rkusb_do_vs_write':
/home/hyy/rk3399pro_optee/u-boot/drivers/usb/gadget/f_rockusb.c:387: undefined reference to `trusty_write_toybrick_seed'
drivers/usb/gadget/built-in.o: In function `rkusb_do_vs_read':
/home/hyy/rk3399pro_optee/u-boot/drivers/usb/gadget/f_rockusb.c:514: undefined reference to `trusty_read_toybrick_cpu_id'
/home/hyy/rk3399pro_optee/u-boot/drivers/usb/gadget/f_rockusb.c:530: undefined reference to `trusty_read_toybrick_cpu_id'
Segmentation fault (core dumped)
make: *** [Makefile:1276: u-boot] Error 139
似乎还有其他文件依赖optee client，我将上述显示未定义的函数在对应的文件中全部注释掉，u-boot编译通过，我将生成的u-boot.img烧写进开发板，发现此时开发板移植不断重启，打印log如下：
atags_set_bootdev: ret 0)
GPT part: 0, name: uboot, start:0x2000, size:0x2000
GPT part: 1, name: trust, start:0x4000, size:0x2000
GPT part: 2, name: boot_linux, start:0x6000, size:0x30000
GPT part: 3, name: rootfs, start:0x36000, size:0x3a07fdf
find part:uboot OK. first_lba:0x2000.
find part:trust OK. first_lba:0x4000.
LoadTrust Addr:0x4000
No find bl30.bin
Load uboot, ReadLba = 2000
Load OK, addr=0x200000, size=0xeb59c
RunBL31 0x40000
NOTICE: BL31: v2.6(release):v2.6-391-gb22f18e36-dirty
NOTICE: BL31: Built : 20:08:06, Feb 17 2022
INFO: GICv3 with legacy support detected.
INFO: ARM GICv3 driver initialized in EL3
INFO: Maximum SPI INTID supported: 287
INFO: plat_rockchip_pmu_init(1625): pd status 3e
INFO: BL31: Initializing runtime services
INFO: BL31: Initializing BL32
D/TC:0 get_aslr_seed:1376 Bad fdt: -9
D/TC:0 plat_get_aslr_seed:109 Warning: no ASLR seed
D/TC:0 add_phys_mem:572 TEE_SHMEM_START type NSEC_SHM 0x0a400000 size 0x00400000
D/TC:0 add_phys_mem:572 TA_RAM_START type TA_RAM 0x08600000 size 0x01e00000
D/TC:0 add_phys_mem:572 VCORE_UNPG_RW_PA type TEE_RAM_RW 0x08461000 size 0x0019f000
D/TC:0 add_phys_mem:572 VCORE_UNPG_RX_PA type TEE_RAM_RX 0x08400000 size 0x00061000
D/TC:0 add_phys_mem:572 ROUNDDOWN((0xF8000000 + 0x06E00000), CORE_MMU_PGDIR_SIZE) type IO_SEC 0xfee00000 size 0x00200000
D/TC:0 add_phys_mem:572 ROUNDDOWN((0xF8000000 + 0x071A0000), CORE_MMU_PGDIR_SIZE) type IO_NSEC 0xff000000 size 0x00200000
D/TC:0 add_phys_mem:572 ROUNDDOWN((0xF8000000 + 0x07330000), CORE_MMU_PGDIR_SIZE) type IO_SEC 0xff200000 size 0x00200000
D/TC:0 add_va_space:611 type RES_VASPACE size 0x00a00000
D/TC:0 add_va_space:611 type SHM_VASPACE size 0x02000000
D/TC:0 dump_mmap_table:729 type TEE_RAM_RX va 0x08400000..0x08460fff pa 0x08400000..0x08460fff size 0x00061000 (smallpg)
D/TC:0 dump_mmap_table:729 type TEE_RAM_RW va 0x08461000..0x085fffff pa 0x08461000..0x085fffff size 0x0019f000 (smallpg)
D/TC:0 dump_mmap_table:729 type SHM_VASPACE va 0x08600000..0x0a5fffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
D/TC:0 dump_mmap_table:729 type RES_VASPACE va 0x0a600000..0x0affffff pa 0x00000000..0x009fffff size 0x00a00000 (pgdir)
D/TC:0 dump_mmap_table:729 type TA_RAM va 0x0b000000..0x0cdfffff pa 0x08600000..0x0a3fffff size 0x01e00000 (pgdir)
D/TC:0 dump_mmap_table:729 type NSEC_SHM va 0x0ce00000..0x0d1fffff pa 0x0a400000..0x0a7fffff size 0x00400000 (pgdir)
D/TC:0 dump_mmap_table:729 type IO_SEC va 0x0d200000..0x0d3fffff pa 0xfee00000..0xfeffffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:729 type IO_NSEC va 0x0d400000..0x0d5fffff pa 0xff000000..0xff1fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:729 type IO_SEC va 0x0d600000..0x0d7fffff pa 0xff200000..0xff3fffff size 0x00200000 (pgdir)
D/TC:0 core_mmu_xlat_table_alloc:494 xlat tables used 1 / 5
D/TC:0 core_mmu_xlat_table_alloc:494 xlat tables used 2 / 5
I/TC:
I/TC: No non-secure external DT
D/TC:0 0 get_console_node_from_dt:70 No console directive from DTB
I/TC: OP-TEE version: 3.11.0-777-g169eac19-dev (gcc version 6.3.1 20170404 (Linaro GCC 6.3-2017.05)) #4 Mon Feb 21 03:00:48 UTC 2022 aarch64
I/TC: Primary CPU initializing
D/TC:0 0 boot_init_primary_late:1257 Executing at offset 0 with virtual load address 0x8400000
D/TC:0 0 call_preinitcalls:21 level 2 mobj_mapped_shm_init()
D/TC:0 0 mobj_mapped_shm_init:449 Shared memory address range: 8600000, a600000
D/TC:0 0 call_initcalls:40 level 1 register_time_source()
D/TC:0 0 call_initcalls:40 level 1 teecore_init_pub_ram()
D/TC:0 0 call_initcalls:40 level 3 platform_init()
D/TC:0 0 platform_secure_ddr_region:35 protecting region 1: 0x8400000-0xa400000
D/TC:0 0 call_initcalls:40 level 3 check_ta_store()
D/TC:0 0 check_ta_store:408 TA store: "Secure Storage TA"
D/TC:0 0 check_ta_store:408 TA store: "REE"
D/TC:0 0 call_initcalls:40 level 3 verify_pseudo_tas_conformance()
D/TC:0 0 call_initcalls:40 level 3 tee_cryp_init()
D/TC:0 0 call_initcalls:40 level 4 tee_fs_init_key_manager()
D/TC:0 0 call_initcalls:40 level 6 dt_driver_release_provider()
D/TC:0 0 call_initcalls:40 level 6 mobj_init()
D/TC:0 0 call_initcalls:40 level 6 default_mobj_init()
D/TC:0 0 call_finalcalls:59 level 1 release_external_dt()
I/TC: Primary CPU switching to normal world boot
INFO: BL31: Initializing BL32 success!!
INFO: bl31_prepare_next_image_entry
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9
U-Boot 2017.09-g22af63bad7-dirty (Feb 22 2022 - 11:09:20 +0800)
Model: Rockchip RK3399 Evaluation Board
PreSerial: 2
DRAM: 3.9 GiB
Sysmem: init
Relocation Offset is: f5bda000
Using default environment
dwmmc@fe320000: 1, sdhci@fe330000: 0
Bootdev(atags): mmc 0
MMC0: HS400, 150Mhz
PartType: EFI
rockchip_get_boot_mode: Could not found misc partition
boot mode: normal
init_resource_list: failed to get boot part, ret=-1
init_resource_list: failed to get resource part, ret=-1
Distro DTB: /extlinux/toybrick.dtb
106116 bytes read in 51 ms (2 MiB/s)
I2c0 speed: 400000Hz
PMIC: RK8090 (on=0x40, off=0x00)
vdd_center 900000 uV
vdd_cpu_l 900000 uV
Warn: can't find connect driver
Warn: can't find connect driver
Failed to found available display route
Warn: can't find connect driver
Warn: can't find connect driver
Failed to found available display route
CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
CLK: (uboot. armb: enter 24000 KHz, init 24000 KHz, kernel 0N/A)
aplll 816000 KHz
apllb 24000 KHz
dpll 800000 KHz
cpll 24000 KHz
gpll 800000 KHz
npll 600000 KHz
vpll 24000 KHz
aclk_perihp 133333 KHz
hclk_perihp 66666 KHz
pclk_perihp 33333 KHz
aclk_perilp0 266666 KHz
hclk_perilp0 88888 KHz
pclk_perilp0 44444 KHz
hclk_perilp1 100000 KHz
pclk_perilp1 50000 KHz
Net: eth0: ethernet@fe300000
Hit key to stop autoboot('CTRL+C'): 0
Could not find misc partition
ANDROID: reboot reason: "(none)"
Not AVB images, AVB skip
load_android_image: Can't find part: boot
Android image load failed
Android boot failed, error -1.
do_boot_rockchip: Could not find rootfs part
Card did not respond to voltage select!
mmc_init: -95, time 9
switch to partitions #0, OK
mmc0(part 0) is current device
Scanning mmc 0:3...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
237 bytes read in 54 ms (3.9 KiB/s)
1: rockchip-kernel-4.4
Retrieving file: /initramfs-toybrick-2.0.img
16096158 bytes read in 177 ms (86.7 MiB/s)
Retrieving file: /extlinux/Image
20918280 bytes read in 226 ms (88.3 MiB/s)
append: earlycon=uart8250,mmio32,0xff1a0000 initrd=/initramfs-toybrick-2.0.img root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rw rootwait rootfstype=ext4
Retrieving file: /extlinux/toybrick.dtb
106116 bytes read in 52 ms (1.9 MiB/s)
"Synchronous Abort" handler, esr 0x96000010
* Relocate offset = 00000000f5bda000
* ELR(PC) = 0000000000222cb8
* LR = 0000000000222dfc
* SP = 00000000f3dcb9b0
* ESR_EL2 = 0000000096000010
EC[31:26] == 100101, Exception from a Data abort, from current exception level
IL[25] == 1, 32-bit instruction trapped
* DAIF = 00000000000003c0
D[9] == 1, DBG masked
A[8] == 1, ABORT masked
I[7] == 1, IRQ masked
F[6] == 1, FIQ masked
* SPSR_EL2 = 0000000040000349
D[9] == 1, DBG masked
A[8] == 1, ABORT masked
I[7] == 0, IRQ not masked
F[6] == 1, FIQ masked
M[4] == 0, Exception taken from AArch64
M[3:0] == 1001, EL2h
* SCTLR_EL2 = 0000000030c51835
I[12] == 1, Icaches enabled
C[2] == 1, Dcache enabled
M[0] == 1, MMU enabled
* HCR_EL2 = 000000000800003a
* VBAR_EL2 = 00000000f5dda800
* TTBR0_EL2 = 00000000f7ff0000
x0 : 000000000a200000 x1 : 000000000000003a
x2 : 000000000a200000 x3 : 00000000f5e71710
x4 : 0000000000000010 x5 : 0000000000000000
x6 : 0000000000000010 x7 : 0000000000000044
x8 : 00000000f5ec3768 x9 : 0000000000000008
x10: 00000000f3e3e1a0 x11: 00000000f3dd9260
x12: 0000000000000000 x13: 0000000000000200
x14: 000000000000000e x15: 00000000ffffffff
x16: 00000000c683ff6f x17: 00000000c265984a
x18: 00000000f3dd1d10 x19: 00000000f5ec34e8
x20: 00000000f3dcbd00 x21: 0000000000800800
x22: 0000000000000016 x23: 00000000f5ec35e0
x24: 00000000f5ec35d8 x25: 00000000f3dcbd40
x26: 00000000f5ead3c8 x27: 0000000000000002
x28: 00000000f3e41f20 x29: 00000000f3dcbba0
SP:
f3dcb9b0: 00000000 00000000 00000000 00000000
f3dcb9c0: 00000000 00000000 f5e99af3 00000000
f3dcb9d0: 00000000 00000000 00000000 00000000
f3dcb9e0: f5e99b3a 00000000 f5e99b60 00000000
f3dcb9f0: f5e99bad 00000000 f5e99bfa 00000000
f3dcba00: f5e99c3a 00000000 f5e99c7a 00000000
f3dcba10: f5e99cb7 00000000 00000000 00000000
f3dcba20: 00000000 00000000 f5e99cf4 00000000
f3dcba30: f3dcbba0 00000000 f5ddaa0c 00000000
f3dcba40: f5ec34e8 00000000 0000000b 00000000
f3dcba50: f7ff0000 00000000 0800003a 00000000
f3dcba60: 30c51835 00000000 f3dcb9b0 00000000
f3dcba70: 40000349 00000000 f5dda800 00000000
f3dcba80: 000003c0 00000000 96000010 00000000
f3dcba90: f5dfccb8 00000000 0a200000 00000000
f3dcbaa0: 0000003a 00000000 0a200000 00000000
Call trace:
PC: [< 00222cb8 >]
LR: [< 00222dfc >]
Stack:
[< 00222cb8 >]
[< 00216058 >]
[< 002086f0 >]
[< 0020e8b4 >]
[< 0020e9ec >]
[< 0020ed48 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00215208 >]
[< 00214954 >]
[< 00214e24 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00214ce0 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00214ce0 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00214ce0 >]
[< 00214ce0 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00214ce0 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00215208 >]
[< 00214954 >]
[< 00214e24 >]
[< 00214ce0 >]
[< 00215208 >]
[< 0021490c >]
[< 00229794 >]
[< 0022a1e0 >]
[< 00215068 >]
[< 00215208 >]
[< 0021490c >]
[< 002296e4 >]
[< 002132f8 >]
[< 00215e44 >]
[< 0027a620 >]
[< 00215fd0 >]
[< 00201b2c >]
Copy above stack info to a file(eg. dump.txt), and
execute command in your U-Boot project: ./scripts/stacktrace.sh dump.txt
Resetting CPU ...
DDR Version 1.24 20191016
In
soft reset
SRX
Channel 0: LPDDR3, 800MHz
CS = 0
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x2
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
CS = 1
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x82
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=32 Size=2048MB
Channel 1: LPDDR3, 800MHz
CS = 0
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x2
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
CS = 1
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x2
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=32 Size=2048MB
256B stride
ch 0 ddrconfig = 0x101, ddrsize = 0x2020
ch 1 ddrconfig = 0x101, ddrsize = 0x2020
pmugrf_os_reg[2] = 0x3AA0DAA0, stride = 0xD
OUT
Boot1: 2019-03-14, version: 1.19
CPUId = 0x0
ChipType = 0x10, 310
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=29820MB
FwPartOffset=2000 , 100000
mmc0:cmd8,20
mmc0:cmd5,20
mmc0:cmd55,20
mmc0:cmd1,20
mmc0:cmd8,20
mmc0:cmd5,20
mmc0:cmd55,20
mmc0:cmd1,20
mmc0:cmd8,20
mmc0:cmd5,20
mmc0:cmd55,20
mmc0:cmd1,20
SdmmcInit=0 1
StorageInit ok = 68658
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
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