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沙发
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发表于 2019-12-6 15:35:38
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附上启动日志方便分析:
DDR Version 1.22 20190506
In
Channel 0: LPDDR3, 800MHz
CS = 0
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x3
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
CS = 1
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x2
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=32 Size=2048MB
Channel 1: LPDDR3, 800MHz
CS = 0
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x2
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
CS = 1
MR0=0x58
MR1=0x58
MR2=0x58
MR3=0x58
MR4=0x2
MR5=0x1
MR6=0x5
MR7=0x0
MR8=0x1F
MR9=0x1F
MR10=0x1F
MR11=0x1F
MR12=0x1F
MR13=0x1F
MR14=0x1F
MR15=0x1F
MR16=0x1F
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=32 Size=2048MB
256B stride
ch 0 ddrconfig = 0x101, ddrsize = 0x2020
ch 1 ddrconfig = 0x101, ddrsize = 0x2020
pmugrf_os_reg[2] = 0x3AA0DAA0, stride = 0xD
OUT
Boot1: 2018-08-06, version: 1.15
CPUId = 0x0
ChipType = 0x10, 217
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=14910MB
FwPartOffset=2000 , 100000
mmc0:cmd8,20
mmc0:cmd5,20
mmc0:cmd55,20
mmc0:cmd1,20
mmc0:cmd8,20
mmc0:cmd5,20
mmc0:cmd55,20
mmc0:cmd1,20
mmc0:cmd8,20
mmc0:cmd5,20
mmc0:cmd55,20
mmc0:cmd1,20
SdmmcInit=0 1
StorageInit ok = 67723
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
GPT part: 0, name: uboot, start:0x2000, size:0x2000
GPT part: 1, name: trust, start:0x4000, size:0x2000
GPT part: 2, name: misc, start:0x6000, size:0x2000
GPT part: 3, name: boot, start:0x8000, size:0x10000
GPT part: 4, name: recovery, start:0x18000, size:0x20000
GPT part: 5, name: backup, start:0x38000, size:0x38000
GPT part: 6, name: security, start:0x70000, size:0x2000
GPT part: 7, name: cache, start:0x72000, size:0x100000
GPT part: 8, name: system, start:0x172000, size:0x500000
GPT part: 9, name: metadata, start:0x672000, size:0x8000
GPT part: 10, name: vendor, start:0x67a000, size:0x100000
GPT part: 11, name: oem, start:0x77a000, size:0x100000
GPT part: 12, name: frp, start:0x87a000, size:0x400
GPT part: 13, name: userdata, start:0x87a400, size:0x375c00
GPT part: 14, name: boot_linux, start:0xbf0000, size:0x30000
GPT part: 15, name: rootfs, start:0xc20000, size:0x10fefdf
find partition:uboot OK. first_lba:0x2000.
find partition:trust OK. first_lba:0x4000.
LoadTrust Addr:0x4000
No find bl30.bin
Load uboot, ReadLba = 2000
Load OK, addr=0x200000, size=0xeec24
RunBL31 0x10000
NOTICE: BL31: v1.3(debug):51f2096
NOTICE: BL31: Built : 16:24:31, May 6 2019
NOTICE: BL31: Rockchip release version: v1.1
INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO: Using opteed sec cpu_context!
INFO: boot cpu mask: 0
INFO: plat_rockchip_pmu_init(1181): pd status 3e
INFO: BL31: Initializing runtime services
INFO: BL31: Initializing BL32
INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-217-g62d4d856 #81 Mon May 13 11:37:54 UTC 2019 aarch64)
INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9
U-Boot 2017.09-00732-gafd25a447a (Aug 20 2019 - 10:40:38 +0800)
Model: Rockchip RK3399 Evaluation Board
PreSerial: 2
DRAM: 3.8 GiB
Sysmem: init
Relocation Offset is: f5bd6000
Using default environment
dwmmc@fe320000: 1, sdhci@fe330000: 0
Card did not respond to voltage select!
mmc_init: -95, time 9
switch to partitions #0, OK
mmc0(part 0) is current device
Bootdev: mmc 0
MMC0: HS400, 150Mhz
PartType: EFI
boot mode: recovery
Android 8.1, Build 2019.8
Load FDT from recovery part
DTB: rk-kernel.dtb
Android header version 0
I2c speed: 400000Hz
PMIC: RK8090 (on=0x10, off=0x00)
vdd_center 900000 uV
vdd_cpu_l 900000 uV
Warn: can't find connect driver
Warn: can't find connect driver
Failed to found available display route
Warn: can't find connect driver
Warn: can't find connect driver
Failed to found available display route
enter Recovery mode!
CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
CLK: (uboot. armb: enter 24000 KHz, init 24000 KHz, kernel 0N/A)
aplll 816000 KHz
apllb 24000 KHz
dpll 800000 KHz
cpll 24000 KHz
gpll 800000 KHz
npll 600000 KHz
vpll 24000 KHz
aclk_perihp 133333 KHz
hclk_perihp 66666 KHz
pclk_perihp 33333 KHz
aclk_perilp0 266666 KHz
hclk_perilp0 88888 KHz
pclk_perilp0 44444 KHz
hclk_perilp1 100000 KHz
pclk_perilp1 50000 KHz
Net: eth0: ethernet@fe300000
Hit key to stop autoboot('CTRL+C'): 0
Read Volup key state: 0 16
No Volup key pressed... Don't boot android.
boot mode: recovery
=Booting Rockchip format image=
Could not found misc partition
Card did not respond to voltage select!
mmc_init: -95, time 9
switch to partitions #0, OK
mmc0(part 0) is current device
Scanning mmc 0:f...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
252 bytes read in 44 ms (4.9 KiB/s)
1: rockchip-kernel-4.4
Retrieving file: /initramfs-4.4-1.rockchip.fc28.aarch64.img
15044448 bytes read in 160 ms (89.7 MiB/s)
Retrieving file: /extlinux/Image
20547592 bytes read in 256 ms (76.5 MiB/s)
append: earlycon=uart8250,mmio32,0xff1a0000 initrd=/initramfs-4.4-1.rockchip.fc28.aarch64.img root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rw rootwait rootfstype=ext4
Retrieving file: /extlinux/toybrick.dtb
104608 bytes read in 61 ms (1.6 MiB/s)
## Flattened Device Tree blob at 08300000
Booting using the fdt blob at 0x8300000
Loading Ramdisk to e8f6d000, end e9dc5f60 ... OK
Loading Device Tree to 00000000e8f50000, end 00000000e8f6c89f ... OK
Adding bank: 0x00200000 - 0x08400000 (size: 0x08200000)
Adding bank: 0x0a200000 - 0xf8000000 (size: 0xede00000)
Total: 1184.893 ms
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Initializing cgroup subsys cpuacct
[ 0.000000] Linux version 4.4.167 (kfx@inno) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-2017.05) ) #78 SMP Wed Aug 21 09:15:51 CST 2019
[ 0.000000] Boot CPU: AArch64 Processor [410fd034]
[ 0.000000] earlycon: Early serial console at MMIO32 0xff1a0000 (options '')
[ 0.000000] bootconsole [uart0] enabled
[ 0.000000] Reserved memory: failed to reserve memory for node 'drm-logo@00000000': base 0x0000000000000000, size 0 MiB
[ 0.000000] Reserved memory: failed to reserve memory for node 'stb-devinfo@00000000': base 0x0000000000000000, size 0 MiB
[ 0.000000] cma: Reserved 256 MiB at 0x00000000d8c00000
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.0 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] PERCPU: Embedded 21 pages/cpu @ffffffc0f7ecc000 s46120 r8192 d31704 u86016
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: enabling workaround for ARM erratum 845719
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 991752
[ 0.000000] Kernel command line: earlycon=uart8250,mmio32,0xff1a0000 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rw rootwait rootfstype=ext4 swiotlb=1 coherent_pool=1m
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
[ 0.000000] software IO TLB [mem 0xf7e84000-0xf7ec4000] (0MB) mapped at [ffffffc0f7e84000-ffffffc0f7ec3fff]
[ 0.000000] Memory: 3658136K/4030464K available (12414K kernel code, 1762K rwdata, 4708K rodata, 1152K init, 2051K bss, 110184K reserved, 262144K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB)
[ 0.000000] vmalloc : 0xffffff8008000000 - 0xffffffbdbfff0000 ( 246 GB)
[ 0.000000] .init : 0xffffff8009140000 - 0xffffff8009260000 ( 1152 KB)
[ 0.000000] .text : 0xffffff8008080000 - 0xffffff8008ca0000 ( 12416 KB)
[ 0.000000] .rodata : 0xffffff8008ca0000 - 0xffffff8009140000 ( 4736 KB)
[ 0.000000] .data : 0xffffff8009260000 - 0xffffff8009418808 ( 1763 KB)
[ 0.000000] vmemmap : 0xffffffbdc0000000 - 0xffffffbfc0000000 ( 8 GB maximum)
[ 0.000000] 0xffffffbdc0008000 - 0xffffffbdc3e00000 ( 61 MB actual)
[ 0.000000] fixed : 0xffffffbffe7fb000 - 0xffffffbffec00000 ( 4116 KB)
[ 0.000000] PCI I/O : 0xffffffbffee00000 - 0xffffffbfffe00000 ( 16 MB)
[ 0.000000] memory : 0xffffffc000200000 - 0xffffffc0f8000000 ( 3966 MB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=6, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] Build-time adjustment of leaf fanout to 64.
[ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=6.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=6
[ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] ITS: /interrupt-controller@fee00000/interrupt-controller@fee20000
[ 0.000000] ITS: allocated 65536 Devices @a280000 (psz 64K, shr 0)
[ 0.000000] ITS: using cache flushing for cmd queue
[ 0.000000] GIC: using LPI property table @0x000000000a210000
[ 0.000000] ITS: Allocated 1792 chunks for LPIs
[ 0.000000] CPU0: found redistributor 0 region 0:0x00000000fef00000
[ 0.000000] CPU0: using LPI pending table @0x000000000a220000
[ 0.000000] GIC: using cache flushing for LPI property table
[ 0.000000] GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
[ 0.000000] GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] }
[ 0.000000] rockchip_clk_register_frac_branch: could not find dclk_vop0_frac as parent of dclk_vop0, rate changes may not work
[ 0.000000] rockchip_clk_register_frac_branch: could not find dclk_vop1_frac as parent of dclk_vop1, rate changes may not work
[ 0.000000] rockchip_cpuclk_pre_rate_change: limiting alt-divider 33 to 31
[ 0.000000] Architected cp15 timer(s) running at 24.00MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
[ 0.000006] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
[ 0.002212] Console: colour dummy device 80x25
[ 0.002643] console [tty0] enabled
[ 0.002978] bootconsole [uart0] disabled
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